Hello world! My name is Tejas Kulkarni and I am currently a Postdoc in PML group located at Aalto University in Finland. I have submitted my Ph.D in the Department of Computer Science at the University of Warwick, UK mentored by Prof. Graham Cormode. Previously, I did my masters with Prof. John Augustine in India.
My current research interests is privacy preserving data analytics. I am affiliated with the WISC.
I spent the academic year 2016-17 at the Alan Turing Institute, London.
All authors are sorted alphabetically (This is a standard convention in theory communities.)
Papers led by me (during my PhD)
- Answering Range Queries Under Local Differential Privacy With Graham Cormode and Divesh Srivastava (ACM VLDB 2019, core A*)
- Marginal Release Under Local Differential Privacy Model. [code] With Graham Cormode and Divesh Srivastava (ACM SIGMOD 2018, core A*)
- Constrained Differential Privacy for Count Data. With Graham Cormode and Divesh Srivastava (IEEE ICDE 2018, extended version In IEEE Transactions on Knowledge and Data Engineering (TKDE), core A*)
- Private Protocols for U-Statistics in the Local Model and Beyond With James Bell, Adria Gascon & Aurelien Bellet (International Conference on AI and Statistics (AISTATS 2020, core A* )
During my masters, I dabbled in the area of theory of distributed algorithms. These are the publications from my masters education.
- Leader Election in Sparse Dynamic Networks with Churn (IEEE IPDPS 2015, core A). With Sumathi Sivasubramanian, John Augustine
- Robust Leader Election For Fast Changing World (FOMC 2013 - A Workshop at ACM DISC 2013) With Paresh Nakhe, John Augustine, Peter Robinson
Here is a short summary of my career and educational trajectory.
- PhD student at the University of Warwick (Nov 2015 - )
- Software Engineer, AdElement Media, Pune, India (Aug 2014 - Oct 2015)
- Masters research student in the Dept. Of Computer Science at Indian Institute Of Technology, Madras, India (Jan 2012- July 2014) with Prof. John Augustine. I was associated with the ACT lab.
- Project internship at LSI Logic Pune, India ( Dec 2011- Feb 2012)
- 6 months diploma In Embedded Systems from CDAC,ACTS, Pune, India(2010- 2011)
- Software engineer at HSBC GLT, Pune (June 2008- July 2009)
- B.E. (Computer Science) , Govt. College Of Engg. Aurangabad, India (2004-2008)
For more details about my work, please visit my LinkedIn page.
I will update about my research as it progresses.
You can contact me at abc[at]d.com where a <= tejas , b <=vijay , c<= kulkarni & d<=gmail