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Dr. Richard Jefferies

Photo of Richard Jefferies

Dr Richard Jefferies B.A., M.Sc., Ph.D., CPhys

Principal Research Fellow

School of Engineering

University of Warwick




Room: D032

Tel: +44(0)247 657 3805

Email: R dot Jefferies at warwick dot ac dot uk



Richard studied at the University of Cambridge, obtaining a BA in Electrical Information and Sciences in 1992. He continued his studies at Imperial College, completing an MSc in Semiconductor Science in 1993. He then joined the Novel Devices Team at the Defence Research Agency (DRA) conducting research into antimonide based III-V semiconductor devices and circuits (1993-2001). Whilst working at DRA, he completed a PhD on high speed transistors with the Department of Physics at Imperial College (2000). Richard then spent several years working at Trikon Technologies as a Senior Etch Process Engineer (2001-2003) before re-joining the now-privatized DRA (QinetiQ) and co-ordinating the development of state of the art InSb quantum well transistors for both low power logic and passive mm-wave applications (2003-2010). From 2010-2012 Richard worked as an Integration Engineer at International Rectifier developing low voltage Si power MOSFETs before joining the Quantum Devices group at the University of Warwick as Principal Research Fellow in 2013.


Research Interests

  • Narrow bandgap semiconductors
  • Ultra-fast low power dissipation transistors
  • LEDs and PDs for mid IR Gas Sensors
  • Infrared detector arrays


Current Research Projects

  • EPSRC Engineering Fellowships for Growth: Narrow Band-gap Semiconductors for Integrated Sensing and Communications with Professor Tim Ashley as PI. Project Start Date: 01/06/2014. Project End Date: 31/05/2017.


Selected Publications

  • T. Ashley, M.T. Emeny, D.G. Hayes, K.P. Hilton, R. Jefferies, J.O. Maclean, S.J. Smith, W.H.A. Tang, P.J. Webber and G.M. Williams, 'High performance InSb QWFETs for Low Power Dissipation Millimetre Wave Applications', 2010 European Microwave Integrated Circuits Conf. (EUMIC), 158 (2010)
  • M. Radosavljevic, T. Ashley, A. Andreev, S.D. Coomber, G. Dewey, M.T. Emeny, M. Fearn, D.G. Hayes, K.P. Hilton, M.K. Hudait, R. Jefferies, T. Martin, R. Pillarisetty, W. Rachmady, T. Rakshit, S.J. Smith, M.J. Uren, D.J. Wallis, P.J. Wilding and R. Chau, ‘High-performance 40nm gate length InSb p-channel compressively strained quantum well field effect transistors for low power (Vcc=0.5V) logic applications’, IEEE Int. Electron Devices Meeting (IEDM) Tech. Dig., 727 (2008)
  • S. Datta, T. Ashley, J. Brask, L. Buckle, M. Doczy, M. Emeny, D. Hayes, K. Hilton, R. Jefferies, T. Martin, T.J. Phillips, D. Wallis, P. Wilding and R. Chau, ‘85nm gate length enhancement and depletion mode InSb quantum well transistors for ultra high speed and very low power digital logic applications’, IEEE Int. Electron Devices Meeting (IEDM) Tech. Dig., 763 (2005)
  • T. Ashley, L. Buckle, S. Datta, M.T. Emeny, D.G. Hayes, K.P. Hilton, R. Jefferies, T. Martin, T.J. Phillips, D.J. Wallis, P.J. Wilding and R. Chau, ‘Heterogeneous InSb quantum well transistors on silicon for ultra-high speed, low power logic applications’, Elect. Lett., 43, 777 (2007)
  • D. J. Wallis, and R. Jefferies, ‘Uniaxial tensile strain in semiconductor devices’, (Priority date 2010), GB Appl’n No. 0906333.0, US Appl’n No. 13/263,621.