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Underpinning Power Electronics: Devices Theme

This project is one of the four themes that are part of the Centre for Power Electronics (CPE), which was awarded funding of £4.1M by the EPSRC in July 2013 (the Devices theme alone received £2.4M of funding) and which aims to be the UK's internationally recognised provider of world-leading, underpinning power electronics research.

For more information about the CPE , please see: www.powerelectronics.ac.uk/power-electronics/index.aspx

The Devices theme focuses on the basic building block of power electronics - i.e. semiconductor components. By enabling the development of new technology, gaining deeper theoretical insight into the physics of failure, building predictive reliability models and compact models, this programme directly links with the other themes of the Centre as well as supporting and stimulating UK manufacturing industries in the area of power electronics.

The theme consists of four workpackages, and involves four UK academic partners from the Universities of Bristol, Cambridge, Newcastle, and Warwick - the lead partner for the theme. Each partner's facilities and expertise is illustrated below.

  • WP 1: Design, Modelling and Fabrication (Warwick)
  • WP 2: Interfaces and Materials (Newcastle)
  • WP 3: Device Reliability (Bristol)
  • WP 4: Power Integrated Circuits (Cambridge)

 

wp1

  • Warwick’s semiconductor cleanroom contains capabilities for acid etching and alkaline processing, lithography,
    wet and dry material etching, thermal oxidation, annealing, and metrology

 

 

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  • Bristol’s integrated IR - Raman thermography system for thermal device imaging. Its electroluminescence (DC and pulsed/time-gated) function is used for device degradation failure analysis. The device can be simulated in both ATLAS & ANSYS software.

 

 

 wp2newcastle

  • Atomic Layer Deposition Equipment at Newcastle for the deposition of novel interface materials. Other specific capabilities include the deposition of a wide range of materials including refractory metals, and the rapid thermal processing furnace enables annealing at temperatures up to 2000°C in argon and nitrogen.

 

 

wp4 

  • Simulated LIGBT device carried out at Cambridge: a) 3D cross-section; b) Breakdown voltage c) On-state I-V curves for Tj=25C and Tj=125C (Vg=5V).