Going back to the subject of controlling strain, let's start with growing relaxed layers. As explained before, there are two ways a strained layer can relax: dislocations or island formation. If one lets the layer relax with dislocations, one wants the minimise the dislocation density as a high dislocation density deteriorates the performance of a device. Maximising the relaxation per dislocation, the dislocation line should be as long as feasible. In order to achieve that, there are three conditions:

1. The temperature at which the sample is grown or the subsequent annealing temperature must be high enough so that the dislocations can propagate far enough.
2. Since dislocation start/end at surfaces, in each other or at impurities, the density of impurities/pinning centres should be as low as possible
3. It should be energetically more favourable to propagate in length than stick at an impurity.
   

These are not compatible conditions and above x>10% in , none of these conditions are found to be satisfied. If the temperature is relatively high so that 1 is satisfied, one might risk breaking 3 since at higher temperatures, one activates the nucleation centres. Another danger is that with higher growth temperatures, the diffusion rate of Ge in the Si substrate becomes higher and one thus doesn't have a nice step between the two layers anymore. Also, at too high growth temperatures, the surface mobility of the atoms on the growth surface increases resulting in a rougher upper surface, which might be a problem during etching after the growth procedure, for example. One thus has several methods to exploit at least one of the abovementioned conditions. The low-temperature method uses condition 3 and very few nucleation centres are activated. In the graded buffer method, one deposits layers of  with a slowly changing x. The dislocations are thus spread in the direction of changing x and it gives good results. Another way is to polish the SiGe buffer surface mechanically and chemically. Layer grown on top were shown to be relaxed. If there are not enough dislocations to achieve sufficient relaxation, one can implant ions and anneal so that exisiting dislocations grow to the impurities and multiply.  

Another possibility to achieve relaxed layers is to compensate the larger lattic constant of Ge by the much smaller lattice constant of C by forming . While the lattice constant difference between Si and Ge is about 4% (larger in Ge than in Si), whereas between Si and C it is about 52% (larger in Si than in C). So to compensate the lattice mismatch caused by 8.2% Ge, one only has to add 1% C. There are, however, three issues with regard to adding C in SiGe: The formation of SiC percipitates, the change in the band structure and local strain. The solubility of C in Si is extremely low and C prefers to form droplets of SiC in the compound. This happens especially at temperatures higher than 900ºC. This might be a problem during deposition. The second issue is that by adding C, the band structure of the compound is altered accordingly so one should take that into account in bandgap engineering. The third issue is local strain: since the bond lengths between in diamond are much smaller than in Si, adding C to SiGe will on average compensate the expansion due to Ge but will add an additional local strain structure to the compound. This may or may not be desirable.