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Dr Peter Gammon

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Dr Peter Gammon

Associate Professor (Reader) in Power Electronic Devices 
Director of Graduate Studies, Engineering
MEng, PhD, SMIEEE, MIET, SFHEA

P dot M dot Gammon at warwick dot ac dot uk
+44 (0)24 765 23154

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Research Interests

With silicon carbide (SiC) power devices now moving into the mainstream, Peter's research is focused on the next generation of SiC devices, in particular the development of ultra-high voltage devices, for use in a number of 21st Century applications, including traction, renewable energy and the electricity distribution network (the grid). He is the PI of the Switch Optimisation Theme (EP/R00448X/1), a project that is part of the EPSRC Centre for Power Electronics (CPE), that is leading the field in producing ultra-high-voltage (10 kV+) SiC IGBT devices, particularly for future grid and HVDC applications.

Another future market for SiC is in satellites and other spacecraft, and Peter leads a major research effort to develop device topologies that could revolutionise power electronics in space. In particular, his research is looking to reveal ways to 'radiation harden' SiC devices, such that the benefits of smaller, lighter, more efficient power supplies can be brought to space. He has been PI on three major projects in this area, including his Royal Academy of Engineering Research Fellowship on silicon-on-silicon carbide (Si/SiC) power devices from 2012-2017, his EPSRC first grant award (EP/N00647X/1), and SaSHa, a H2020 project he led with UCLouvain, Tyndall and Cambridge Microelectronics.

Peter conducted his PhD into the development and characterisation SiC Schottky diodes, a subject that he retains a strong interest in. He has written well-cited papers on the Inhomogeneous SiC Schottky Interface, and was the first to identify a method to improve the SiC Schottky contact, using a P2O5 pre-treatment to produce Mo/SiC diodes with ultra-low off-state leakage. Two feasibility studies, the Trasica Project in 2018 funded by Innovate UK, and the ASSATTA Project, in 2020 funded by the CPE, are further developing this process, in order to produce 3.3 kV SiC junction barrier Schottky diodes for a European traction application.

Peter is a member of the EPSRC Centre for Power Electronics National Executive. He was the technical programme chair and lead proceedings editor for the 2018 European SiC conference (ECSCRM) in Birmingham, UK. He has published two book chapters, over 25 journal papers and 30 peer reviewed conference papers, and regularly presents his work at international conferences. He is a Senior Member of the IEEE.

Teaching and Administration

In 2020, Peter became a Senior Fellow of the Higher Education Academy (SFHEA).

Peter is the Director of Graduate Studies for the School of Engineering, overseeing the School's MPhil/PhD course, with over 175 registered students. In his time in this role, he has introduced the new MPhil/PhD course (from a PhD-only course), grown the School's PGR numbers and updated the administration of the course.

Peter currently supervises five PhD students, and takes on 1-2 students per year. If you are interested in doing a PhD in SiC Power Semiconductor Devices, please contact me by email.

Peter teaches Power Electronic Devices to the School of Engineering's third year undergraduates and taught Masters students. This covers the essentials of power semiconductor device physics, and the operation of diodes, thyristors, bipolar transistors, MOSFETs and IGBTs, as well as the impact of wide bandgap materials.

Peter's outreach activities include a seminar session on renewable energy for school and college age students.

Projects and Grants

2019; Advancing SiC Schottky Diode Technology for Traction Applications (ASSATTA); EPSRC Centre for Power Electronics: Knowledge Exchange Awards; with Cambridge University and Dynex Semiconductor; £90k.

2017; Underpinning Power Electronics 2017-2020: Switch Optimisation Theme; EPSRC EP/R00448X/; with Nottingham, Newcastle, and Cambridge Universities; £1.2M.

2017 Multi-User Equipment to Refresh Underpinning Analytical Capabilities at the University of Warwick; EPSRC EP/P030572/1; (Co-investigator); £2M     

2016; High current 3.3kV SiC Schottky diodes for hybrid modules in traction applications (TRASiCA); Innovate UK 102897; with Cambridge Microelectronics and Dynex Semiconductor; £500k.

2015; Si/SiC Power Devices for high temperature, hostile environment applications; EPSRC First Grant EP/N00647X/1; £125k.

2015; SaSHa Project (Si on SiC for the Harsh Environment of Space); H2020-COMPET-2015-03; with UC Leuven, Belgium, Cambridge Microelectronics and Tyndall, Ireland; €1M.

2012; NICHE Project; RAEng Research Fellowship; £530k

SiC Facilities

The PEATER Group is one of the leading research groups in the world focused on SiC device development, with a suite of equipment and facilities to match. This includes:

  • The Science City Cleanroom, a 150 m2 ISO class 6 cleanroom including high temperature oxidation and annealling furnaces, photolithography, etching and wet processing, metal deposition, and atomic layer deposition.
  • The UK’s only industrial SiC CVD reactor in an ISO class 4 cleanroom, used for the epitaxial growth of SiC.
  • Characterisation Facilities, including a Keysight B1505A power device analyser and a SemiProbe semi-automated wafer prober for device characterisation up to 10 kV, 100 A and 300 °C.

  • An ISO class-8 packaging cleanroom.

Publications and other content.

  • Peter's full and up-to-date list of publications are available on Google Scholar.
  • A 2019 tutorial on SiC Power Devices that Peter gave at a EPSRC Centre for Power Electronics event is free to download here.