Edit content blocks
Academic Profile "Edit content blocks" guidance
The Academic Profile pages use a standard School of Engineering template to give a degree of consistency for all our staff profiles. The template is intended to be easy to use and reasonably flexible. The are some standard content blocks to filled in:
- Photograph (hp-01-image) Image dimensions: 1170 x 500 pixels.
- "Business card" title (hp-02-title)
- "Business card" contact details (hp-03-contact) There are hidden icons for the social media LinkedIn, Twitter, Google Scholar, Researchgate and ORCID here.
Left hand side
- Biography (hp-04-biography)
- Research Interests (hp-06-research_interests)
- Teaching Interests (hp-07-teaching_interests)
- Selected Publications (hp-08-publications) Selected only, please!
- Projects and Grants (hp-09-grants)
Right hand side
- Office / hours / address (hp-05-sidebar)
Plus there are four additional blocks available for use on the left hand side and two on the right hand side. The display order of the content blocks cannot be changed.
The content in any block can be updated through the "Edit" button; any blocks that do not contain a minimum amount of content will be hidden on the profile page. Please do not change the Title of any content block as this will break the link to the Profile page.
If these blocks are too restrictive for the content you wish to publish, then you have Edit permission for your own profile and can create any number of standard Sitebuilder sub-pages. Just make sure not to create the sub-pages beneath this "hp-content" page -- create them below your main profile page so that they can be seen in the menu.
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Dr Suhaib Fahmy
Reader in Computer Engineering
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s dot fahmy at warwick dot ac dot uk
+44 (0) 24 7657 5471
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Biography
Suhaib Fahmy lead the Connected Systems Research Group and Adaptive Reconfigurable Computing Lab within the School of Engineering at Warwick. He is also Turing Fellow at The Alan Turing Institute. He graduated from Imperial College London in 2003 with a First Class Honours MEng in Information Systems Engineering, and in 2008 with a PhD in Electrical and Electronic Engineering. From 2007 to 2009, he was Postdoctoral Research Fellow at CTVR, Trinity College Dublin and Visiting Research Engineer at Xilinx Research Labs, Ireland, working on adaptive architectures for cognitive and software-defined radio systems. He was Assistant Professor in the School of Computer Engineering at Nanyang Technological University from 2009 to 2015, where he served as Deputy Director of the Centre for High Performance Embedded Systems (CHiPES), and Deputy Program Director for the MSc in Embedded Systems. His research there explored the use of reconfigurable systems in domains including communications, cyber-physical systems, and automotive networks. He joined the University of Warwick in 2015.
Dr Fahmy received the Best Paper Award at the IEEE Conference on Field Programmable Technology (FPT) in 2012, the IBM Faculty Award in 2013, a UK Foreign and Commonwealth Office Collaborative Development Award in 2013, the Community Award at the International Conference on Field-Programmable Logic and Applications in 2016, and the ACM Transactions on Design Automation of Electronic Systems Best Paper Award in 2019. He serves on the technical program committees for a number of prestigious conferences in the area of reconfigurable computing, actively reviews for many journals in related areas, and sits on the ACM Technical Committee on FPGAs. Dr Fahmy is a Senior Member of the IEEE, Senior Member of the ACM, Chartered Engineer and Fellow of the IET, and Fellow of the Higher Education Academy.
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Write to
School of Engineering, University of Warwick, Coventry, CV4 7AL
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Research Interests
- Reconfigurable computing;
- field programmable gate arrays (FPGAs);
- compute acceleration;
- automotive systems;
- dynamically adaptive systems;
- adaptive radio systems.
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Teaching Interests
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Selected Publications
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Projects and Grants
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Team
Dr Fahmy’s research team includes the following students and previous graduates:
Student | Degree | Since | Topic |
---|---|---|---|
Beniel Thileepan | PhD | 2022 | Tooflows for FPGA Acceleration of HPC Applications (co-supervised with Gihan Mudalige) |
Alumni
Research staff who have been part of the team in the past:
- Bhaskar Banerjee (now SoC Engineer at Nokia)
- Nadesh Ramanathan (now Research Associate at Imperial College London)
- Fredrik Brosser (now Characterization Engineer at Xilinx)
- Nidhin Thandassery Sumidhran (now Research Associate at Ulster University)