PhD Opportunities

Current Proposals / Research Topics

I am happy to discuss potential PhD projects on the following topics. (Updated 27/11/2023)

Machine Learning-based Compiler Optimization and code-generation techniques
Domain Specific Languages for new application domains and programming emerging and novel architectures

Previous Proposals / Research Topics

1. Parallel Programming FPGA Architectures using High-Level Abstractions

(*Unavailable* - Student Recruited - 06/07/2023)

FPGAs have become highly attractive as a heterogeneous, low-power architecture that can be reconfigured or re-programmed, optimizing the hardware itself for the computation. In recent years, considerable effort has been put in by hardware vendors such as Intel and Xilinx to produce commercial FPGA products. The aim has been to demonstrate the performance benefits of using FPGAs, for both runtime and energy consumption, when used to solve applications for specialized domains such as cyber security, deep learning, high-performance computing and AI. However, a key limitation has been the effort required to programme these devices, often demanding the conversion of standard programmes into a unique programming model – data flow programming – to target the FPGA architecture. Compounding the issue is the need to be highly-proficient in this programming model to gain the best performance. Commercial FPGA vendors have attempted to address this problem with High-Level Synthesis (HLS) tools, compiler toolchains to translate programmes written in standard C/C++/OpenCL type languages to low-level hardware synthesis. However, HLS tools must be carefully used to follow the data-flow programming model to obtain the best performance from the FPGA devices.

One solution to this problem is the use of high-level abstractions (HLA) based on Domain Specific Languages (DSLs). The idea is to separate concerns in which the application developer specifies what is to be computed, without detailing how it is to be implemented. To this end, a DSL will provide a language or API with which an algorithm or application could be written using domain specific constructs. As the API is embedded in a host language such as Fortran or C/C++ the domain scientists simply see the development process as writing a standard sequential application by calling classical library functions. The DSL will then be able to automatically generate various parallelizations (OpenMP, MPI, CUDA, etc.) from this higher-level “declaration” of the problem, using compiler techniques such as source-to-source translation and code generation. This research proposal aims to use such a DSL, OPS for generating highly optimized code for FPGA architectures.

Current work at the High Performance and Scientific Computing group has developed high-level FPGA accelerator designs for structured mesh based explicit numerical solvers [1] such as the ones targeted by OPS and FPGA designs for high-throughput multidimensional tridiagonal solvers that uses implicit methods [2]. The proposed PhD research, will be based on this current work and will be aimed at extending the OPS framework to generate, automatically the above target designs. Key challenges will be how the above designs can be refactored and generalized to be amenable to automatic source-to-source code generation and the selection and utility of compiler technologies to implement the code generator itself. The research will also aim to investigate how the FPGA designs can be extended to multiple FPGA devices, possibly through distributed memory paralleization on clusters of FPGAs such as the new ExCALIBUR test bed system at EPCC [3]. The work will investigate both runtime performance as well as energy efficiency improvements, comparing the FPGA based solutions to traditional hardware architectures such as CPUs and GPUs.

Applicants should contact Dr Gihan Mudalige (g.mudalige@warwick.ac.uk) with their CV.

[1] K. Kamalakkannan, G.R. Mudalige, I.Z. Reguly, S.A. Fahmy, High-Level FPGA Accelerator Design for Structured-Mesh-Based Explicit Numerical Solvers, in 2021 IEEE International Parallel and Distributed Processing Symposium (IPDPS 2021), Portland Oregon, USA, 2021 pp. 1087-1096. doi: 10.1109/IPDPS49936.2021.00117 (arxiv) (Preprint-PDF)

[2] K. Kamalakkannan, I.Z. Reguly, S.A. Fahmy, and G.R. Mudalige, High Throughput Multidimensional TridiagonalSystems Solvers on FPGAs. 2022 (Under Review)

[3] https://www.epcc.ed.ac.uk/blog/2021/08/fpgas-hpc

2. PhD Studentship in Computer Science - Expressing Numerical Algorithms in Performance Portable Frameworks

(*Unavailable* - Student Recruited - 11/08/2020)

Computational fluid dynamics (CFD) has been one of the most important classes of applications targeted by high-performance computing (HPC). Use of CFD in HPC is motivated by the need for solving challenging multi-physics problems. Industries such as aerospace, nuclear power and oil and gas regularly employ these codes at scale requiring flexibility to adapt the computations to a specific problem.

With diminishing returns from Moore’s Law in recent years, accelerators, in particular GPUs, have become an important technology to boost application performance. Accelerators can now be found in many top-tier supercomputers, including Summit (ORNL) and Sierra (LLNL) as well as Europe’s Piz Daint (ETH Zurich). The use of accelerators raises concerns in terms of programming complexity and performance portability. This is even more noticeable in CFD applications that already have large established production code bases optimized for CPUs. To address these challenges new algorithms, programming paradigms and frameworks are being actively developed in the effort to create more flexible software ecosystem of the future.

Warwick University in collaboration with the University of Oxford, PPCU Hungary and Imperial College London have made important contributions in performance portability with domain-specific languages (DSLs). DSLs are designed to provide a high-level abstraction with a set of directives with well-defined semantics that the engineer or scientist can use to quickly define their model. They serve as a building block and hide boiler plate and implementation details for specific architectures.

IBM Research group at Daresbury Laboratory is working with several UK industries that leverage HPC, helping them to take full advantage of constantly evolving hardware and software stacks. Based on the current limitations in computer modelling, IBM-R is interested to build a prototype implementation of a flow solver that would serve as a testbed for novel algorithms and flexible data structures. Warwick and IBM-R have worked together in the past and both are committed to taking the DSL approach to the next level. The student will be joining a motivated group of academics and practitioners in the field and through interaction with both, will undertake an exploration in both numerical methods and acquire substantial experience in advanced compiler technologies.

This PhD research project will target the development of these algorithms and the creation of the user-friendly abstractions to demonstrate them in a DSL so as to enable wider adoption. The project involves a minimum of three months placement at IBM where the student will work with IBM-R team accessing latest software and hardware capability available at Daresbury.

Eligibility

Due to funding restrictions, the position is only available for UK/EU candidates.

Previous experience in computational fluid dynamics and/or parallel programming using at least two of MPI, OpenMP, CUDA or OpenCL will be highly desirable.

Further Details

The successful candidate is expected to spend the summer months working at IBM research Daresbury.

This studentship's funding consists of full payment of tuition fees at the Home/EU rate for 3 years, an annual stipend at the UKRI rates (currently £15,009 for 2019/2020) for 3.5 years and an IBM top-up allowance.

Applicants are strongly encouraged to contact Dr Gihan Mudalige (g.mudalige@warwick.ac.uk) with their CV.

3. PhD Studentship in Computer Science (High Performance Computing) - Unstructured-mesh CFD Applications

(*Unavailable* - Student Recruited - 02/07/2019)

The High Performance and Scientific Computing Research group at the Department of Computer Science has a 3.5 year, fully funded PhD studentship available for the academic year starting Oct 2018 (or immediately after).

Due to the end of frequency scaling around the middle of the last decade, as a result of the unsustainable increase in energy consumption, processor architectures have moved towards massively parallel designs. Consequently, modern architectures are leading to the development of multi-core, many-core and heterogeneous processors. The expectation is that performance improvements of applications could be maintained at historical rates by exploiting these increasing levels of parallelism. However, the means with which we are to take advantage of this massive parallelism - our current programming models and environments, are rapidly approaching their limits, risking continued scientific delivery expected through the full utility of future systems. As such the high-performance computing (HPC) community is struggling to gain performance portability where an application can be efficiently executed on a wide range of HPC architectures without significant manual modifications.

One solution is to utilize a high-level abstractions (HLA) based on Domain Specific Languages (DSLs). The idea is to separate concerns in which the application developer specifies what is to be computed, without detailing how it is to be implemented. To this end, a DSL will provide a language or API with which an algorithm or application could be written using domain specific constructs. As the API is embedded in a host language such as Fortran or C/C++ the domain scientists simply see the development process as writing a standard sequential application by calling classical library functions. However, the DSL will then be able to automatically generate various parallelizations (OpenMP, MPI, CUDA, etc.) from this higher-level “declaration” of the problem, using compiler techniques such as source-to-source translation and code generation. This PhD studentship will entail working with such a DSL, OP2 (op-dsl.github.io) for the solution of unstructured mesh applications.

This project will involve working with a number of academic and industrial partners of the group including Rolls-Royce plc.

Eligibility

Candidates must possess, or expect to obtain, a high 2:1 or 1st class degree and/or a good master’s in Computer Science, Computer Systems Engineering, Mathematics or a related discipline from a recognised University. Previous experience in parallel programming using at least two of MPI, OpenMP, CUDA or OpenCL will be highly desirable.

Further Details

Applicants are strongly encouraged to contact Dr Gihan Mudalige (g.mudalige@warwick.ac.uk) with their CV and a covering letter.

4. PhD Studentship in Computer Science (High Performance Computing) - Wavefront Applications

(*Unavailable* - 02/07/2019)

The High Performance and Scientific Computing (HPSC) Research group at the University of Warwick’s Department of Computer Science has a 3.5 year, fully funded (Home/EU fees + stipend) PhD studentship available for the academic year starting Oct 2018 (or immediately after).

Recent and ongoing research work at the University of Warwick has investigated the utility of Domain Specific Languages (DSLs), for the development of future proof, optimized numerical simulation applications. The OP2 and OPS DSLs (https://op-dsl.github.io/) developed as part of this work specifically targets the domains of unstructured and structured mesh computations. These DSLs appear as classical software libraries with a domain specific API embedded in C/C++ and Fortran but uses source-to-source translation to generate different parallelizations to produce highly optimized platform specific code, utilizing the best low-level features of a target architecture.

Both OP2 and OPS requires the algorithms implemented to be order independent where the order of execution of mesh elements cannot affect the end result, within machine precision. This restriction has allowed the eDSLs to take full control of the computation and communication, including mesh partitioning and scheduling for gaining maximum performance. However, another important class of applications requires order of execution to be preserved during execution. Implemented as a sweep or wavefront of computations progressing through the mesh, these applications limit the available amount of paralleization that can be exploited. The objective of this PhD is to research and develop a DSL, based on techniques/lessons learnt from OP2/OPS for this class of applications.

The initial objectives will be to (1) develop the high-level abstraction including an API to declare a wavefront application, (2) utilize source-to-source translation / compilation techniques to automatically generate different parallel implementations of the application (MPI, OpenMP, CUDA, OpenCL, SIMD etc.) and (3) apply the DSL to develop industry representative numerical simulation programs and investigate its performance on modern multi-core and many-core hardware. A core part of the research will involve working with a number of HPSC’s industrial partners., in applying the new DSL for their production CFD applications and optimizing performance.

Depending on the interests of the successful candidate, further goals could be (1) generating code targeting asynchronous task-based parallelization models and (2) exploring source-to-source translation using Clang/LLVM for DSL frameworks. The project will have access to the latest large-scale multi-core and many core systems together with opportunities to develop links with a wide range of industrial partners of the research group.

Eligibility

Candidates must possess, or expect to obtain, a high 2:1 or 1st class degree and/or a good masters in Computer Science, Computer Systems Engineering, Mathematics or a related discipline. Previous experience in parallel programming using at least two of MPI, OpenMP, CUDA or OpenCL will be highly desirable.

Further Details

Due to funding restrictions, the position is only available for UK/EU candidates. To apply for this studentship, applicants are requested to contact Dr. Gihan Mudalige (g.mudalige@warwick.ac.uk) with their CV and a cover letter.