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Suneth Ekanayake

I am currently a final-year PhD student in the Department of Computer Science at the University of Warwick. I'm a member of the High Performance and Scientific Computing Group (HPSC)Link opens in a new window and am supervised by Dr. Gihan MudaligeLink opens in a new window. I'm currently working on the ASiMoV project in collaboration with Rolls-Royce plc. and several other universities.

Before coming to Warwick, I worked as an Associate Tech Lead at the London Stock Exchange Group and led the Johannesburg Stock Exchange team for its go-live in 2019. I obtained my bachelor's degree with a first class in Electronic and Telecommunication Engineering and my master's degree in Computer Science specializing in Parallel Computing from the University of Moratuwa in Sri Lanka.

Research

My research is centred around high-performance computing (HPC) and the development of communication-avoiding algorithms for unstructured-mesh applications, specifically with the OP2Link opens in a new window domain-specific language (DSL). Throughout my work, I've created a communication-avoidance (CA) framework for OP2 DSL, focusing on its distributed-memory parallel operation. Additionally, I've developed a performance model that can predict the potential benefits of using the CA framework.

GitHub: OP2 DSL CA frameworkLink opens in a new window

Teaching

I am working as a senior graduate teaching assistant for the following undergraduate modules at the Department of Computer Science.

Conferences and Workshops

Publications

  • S. Ekanayake, I.Z. Reguly, F. Luporini, G.R. Mudalige. Communication-Avoiding Optimizations for Large-Scale Unstructured-Mesh Applications with OP2, in 52nd International Conference on Parallel Processing (ICPP 2023), Salt Lake City, UT USA 2023. doi:10.1145/3605573.3605604 (Accepted for Publication) (PreprintLink opens in a new window)
Self

Contact

MB 4.17
Mathematical Sciences Building
University of Warwick
Coventry CV4 7AL
Email: