The High Performance and Scientific Computing Research group at the Department of Computer Science has a 3.5 year, fully funded (Home/EU fees + stipend) PhD studentship available for the academic year starting Oct 2018.

Description

Due to the end of frequency scaling around the middle of the last decade, as a result of the unsustainable increase in energy consumption, processor architectures have moved towards massively parallel designs. Consequently, modern architectures are leading to the development of multi-core, many-core and heterogeneous processors. The expectation is that performance improvements of applications could be maintained at historical rates by exploiting these increasing levels of parallelism. However, the means with which we are to take advantage of this massive parallelism - our current programming models and environments, are rapidly approaching their limits, risking continued scientific delivery expected through the full utility of future systems. As such the high-performance computing (HPC) community is struggling to gain performance portability where an application can be efficiently executed on a wide range of HPC architectures without significant manual modifications.

One solution is to utilize a high-level abstractions (HLA) based on Domain Specific Languages (DSLs). The idea is to separate concerns in which the application developer specifies what is to be computed, without detailing how it is to be implemented. To this end, a DSL will provide a language or API with which an algorithm or application could be written using domain specific constructs. As the API is embedded in a host language such as Fortran or C/C++ the domain scientists simply see the development process as writing a standard sequential application by calling classical library functions. However, the DSL will then be able to automatically generate various parallelizations (OpenMP, MPI, CUDA, etc.) from this higher-level “declaration” of the problem, using compiler techniques such as source-to-source translation and code generation. This PhD studentship will entail working with such a DSL, OP2 (https://op-dsl.github.io/) for the solution of unstructured mesh applications.

The initial objective of the project is to research and develop OP2 to generate parallel code utilizing the upcoming OpenMP4.5/5.0 extensions for programming GPU systems. Due to the irregular nature of unstructured-mesh algorithms, gaining near-optimal performance using OpenMP directives as opposed to the more well established CUDA/OpenCL language extensions is a challenge. A core part of the project will involve working with Rolls-Royce plc., in applying the new paralleizations for their production CFD applications and optimizing performance.

Depending on the interests of the successful candidate, further goals could be (1) generating code targeting asynchronous task-based parallelization models, (2) extending OP2 to support adaptive mesh refinement, and (3) exploring source-to-source translation using Clang/LLVM for HLA frameworks. The project will have access to the latest large-scale multi-core and many core systems, together with opportunities to develop links with a wide range of industrial partners of the research group.

Eligibility - Candidates must possess, or expect to obtain, a high 2:1 or 1st class degree and/or a good master’s in Computer Science, Computer Systems Engineering, Mathematics or a related discipline. Previous experience in parallel programming using at least two of MPI, OpenMP, CUDA or OpenCL will be highly desirable.

Further Details - Due to funding restrictions, the position is only available for UK/EU candidates. Scholarship to include Home/EU fees and stipend at current RCUK rates. Applicants are strongly encouraged to contact Dr Gihan Mudalige with a copy of their CV and covering statement. G.Mudalige@warwick.ac.uk